TROJ_LOVELETTER.DAM

Data de publicação: 09 fevereiro 2016

Plataforma:

Windows

Classificao do risco total:

Potencial de dano:

Potencial de distribuição:

infecção relatada:

Baixo

Medium

Alto

Crítico

Tipo de grayware:
Trojan
Destrutivo:
Não
Criptografado:
In the Wild:
Sim

Visão geral

Löscht Dateien, so dass Programme und Anwendungen nicht ordnungsgemäß ausgeführt werden.

Detalhes técnicos

Tipo de compactação: 17,048,872 bytes

Tipo de arquivo: EXE

Residente na memória: Não

Data de recebimento das amostras iniciais: 09 fevereiro 2016

Installation

Erstellt die folgenden Ordner:

%User Temp%\pft7~tmp
%User Temp%\pft7~tmp\Disk1
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE
%User Temp%\pft7~tmp\Disk1\vhdl\src
%User Temp%\pft7~tmp\Disk1\vhdl
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\bin\nt
%User Temp%\pft7~tmp\Disk1\bin
%User Temp%\pft7~tmp\Disk1\data\lib5\proptbl
%User Temp%\pft7~tmp\Disk1\data\lib5
%User Temp%\pft7~tmp\Disk1\data
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\pldlib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\aim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\standard
%User Temp%\pft7~tmp\Disk1\data\xlnxlib
%User Temp%\pft7~tmp\Disk1\data\xportlib
%User Temp%\pft7~tmp\Disk1\data\webpack
%User Temp%\pft7~tmp\Disk1\data\vhdlan\ieee
%User Temp%\pft7~tmp\Disk1\data\vhdlan
%User Temp%\pft7~tmp\Disk1\data\vhdlan\logiblox
%User Temp%\pft7~tmp\Disk1\data\vhdlan\lpm
%User Temp%\pft7~tmp\Disk1\data\vhdlan\pls
%User Temp%\pft7~tmp\Disk1\data\vhdlan\standard
%User Temp%\pft7~tmp\Disk1\data\vhdlan\stdarith
%User Temp%\pft7~tmp\Disk1\data\vhdlan\xc
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish
%User Temp%\pft7~tmp\Disk1\help\nt
%User Temp%\pft7~tmp\Disk1\help
%User Temp%\pft7~tmp\Disk1\help\data\chipviewer
%User Temp%\pft7~tmp\Disk1\help\data
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE
%User Temp%\pft7~tmp\Disk1\verilog\src
%User Temp%\pft7~tmp\Disk1\verilog
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld
%User Temp%\pft7~tmp\Disk1\WPexamples
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd
%User Temp%\pft7~tmp\Disk1\doc\usenglish
%User Temp%\pft7~tmp\Disk1\doc
%User Temp%\pft7~tmp\Disk1\xpla
%User Temp%\_ISTMP1.DIR
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR
%System Root%\Xilinx_WebPACK
%System Root%\Xilinx_WebPACK\vhdl
%System Root%\Xilinx_WebPACK\vhdl\src
%System Root%\Xilinx_WebPACK\vhdl\src\iSE
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\abel
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\xc9000
%System Root%\Xilinx_WebPACK\bin
%System Root%\Xilinx_WebPACK\bin\nt
%System Root%\Xilinx_WebPACK\data
%System Root%\Xilinx_WebPACK\data\lib5
%System Root%\Xilinx_WebPACK\data\lib5\proptbl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\pldlib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\standard
%System Root%\Xilinx_WebPACK\data\xlnxlib
%System Root%\Xilinx_WebPACK\data\xportlib
%System Root%\Xilinx_WebPACK\data\webpack
%System Root%\Xilinx_WebPACK\data\vhdlan
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox
%System Root%\Xilinx_WebPACK\data\vhdlan\lpm
%System Root%\Xilinx_WebPACK\data\vhdlan\pls
%System Root%\Xilinx_WebPACK\data\vhdlan\standard
%System Root%\Xilinx_WebPACK\data\vhdlan\stdarith
%System Root%\Xilinx_WebPACK\data\vhdlan\xc
%System Root%\Xilinx_WebPACK\help
%System Root%\Xilinx_WebPACK\help\nt
%System Root%\Xilinx_WebPACK\help\nt\usenglish
%System Root%\Xilinx_WebPACK\verilog
%System Root%\Xilinx_WebPACK\verilog\src
%System Root%\Xilinx_WebPACK\verilog\src\iSE
%System Root%\Xilinx_WebPACK\verilog\src\iSE\xc9000
%System Root%\Xilinx_WebPACK\WPexamples
%System Root%\Xilinx_WebPACK\WPexamples\cpld
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property
%System Root%\Xilinx_WebPACK\WPexamples\fpga
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd
%System Root%\Xilinx_WebPACK\doc
%System Root%\Xilinx_WebPACK\doc\usenglish
%System Root%\Xilinx_WebPACK\help\data
%System Root%\Xilinx_WebPACK\help\data\chipviewer
%System Root%\Xilinx_WebPACK\xpla
%Start Menu%\Programs\Xilinx WebPACK
%Start Menu%\Programs\Xilinx WebPACK\Accessories

(Hinweis: %User Temp% ist der Ordner 'Temp' des aktuellen Benutzers, normalerweise C:\Dokumente und Einstellungen\{Benutzername}\Lokale Einstellungen\Temp unter Windows 2000, XP und Server 2003.. %System Root% ist der Stammordner, normalerweise C:\. Dort befindet sich auch das Betriebssystem.. %Start Menu% ist der Ordner 'Startmenü' des aktuellen Benutzers, normalerweise C:\Windows\Profile\{Benutzername}\Startmenü unter Windows 98 und ME, C:\WINNT\Profile\{Benutzername}\Startmenü unter Windows NT und C:\Windows\Startmenü oder C:\Dokumente und Einstellungen\{Benutzername}\Startmenü unter Windows 2000, XP und Server 2003.)

Andere Systemänderungen

Löscht die folgenden Dateien:

%User Temp%\pft7.tmp
%User Temp%\plf1.tmp
%Windows%\_iserr31.ini
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\Corecomp.ini
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\Ctl3d32.dll
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\_IsRes.Dll
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\IsUninst.728
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\IsUninst.exe
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\license.txt
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\value.shl
%Windows%\IsUninst.exe
%System Root%\Xilinx_WebPACK\Uninst_WPabelcpld.isu
%System Root%\Xilinx_WebPACK\about_ver_bottom.html
%System Root%\Xilinx_WebPACK\about_ver_top.html
%System Root%\Xilinx_WebPACK\about_versions.html
%System Root%\Xilinx_WebPACK\devicesupportpage.html
%System Root%\Xilinx_WebPACK\webpack_overview.html
%System Root%\Xilinx_WebPACK\WEBPACK_setup.reg
%System Root%\Xilinx_WebPACK\revhist_design_entry.html
%System Root%\Xilinx_WebPACK\relnote_design_entry.html
%System Root%\Xilinx_WebPACK\readme_design_entry.html
%System Root%\Xilinx_WebPACK\ver_design_entry.html
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\abel\.data
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\abel\aim.vhd
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\abel\pls.vhd
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\xc9000\.data
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\xc9000\xc9000_macro.vhd
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\xc9000\xc9000_macro_comp.vhd
%System Root%\Xilinx_WebPACK\bin\nt\ntwaveh.dll
%System Root%\Xilinx_WebPACK\bin\nt\cw3230mt.dll
%System Root%\Xilinx_WebPACK\bin\nt\libbasdr.dll
%System Root%\Xilinx_WebPACK\bin\nt\libGui_Framework.dll
%System Root%\Xilinx_WebPACK\bin\nt\libInterToolCommunication.dll
%System Root%\Xilinx_WebPACK\bin\nt\libLbGblox.dll
%System Root%\Xilinx_WebPACK\bin\nt\libXml.dll
%System Root%\Xilinx_WebPACK\bin\nt\ahdl2blf.728
%System Root%\Xilinx_WebPACK\bin\nt\ahdl2blf.exe
%System Root%\Xilinx_WebPACK\bin\nt\ascin.728
%System Root%\Xilinx_WebPACK\bin\nt\ascin.exe
%System Root%\Xilinx_WebPACK\bin\nt\ascout.728
%System Root%\Xilinx_WebPACK\bin\nt\ascout.exe
%System Root%\Xilinx_WebPACK\bin\nt\asyin.728
%System Root%\Xilinx_WebPACK\bin\nt\asyin.exe
%System Root%\Xilinx_WebPACK\bin\nt\asyout.728
%System Root%\Xilinx_WebPACK\bin\nt\asyout.exe
%System Root%\Xilinx_WebPACK\bin\nt\navlink.dll
%System Root%\Xilinx_WebPACK\bin\nt\blf2lang.728
%System Root%\Xilinx_WebPACK\bin\nt\blf2lang.exe
%System Root%\Xilinx_WebPACK\bin\nt\blif2eqn.728
%System Root%\Xilinx_WebPACK\bin\nt\blif2eqn.exe
%System Root%\Xilinx_WebPACK\bin\nt\blif2net.728
%System Root%\Xilinx_WebPACK\bin\nt\blif2net.exe
%System Root%\Xilinx_WebPACK\bin\nt\bliflink.728
%System Root%\Xilinx_WebPACK\bin\nt\bliflink.exe
%System Root%\Xilinx_WebPACK\bin\nt\blifopt.728
%System Root%\Xilinx_WebPACK\bin\nt\blifopt.exe
%System Root%\Xilinx_WebPACK\bin\nt\blifsim.728
%System Root%\Xilinx_WebPACK\bin\nt\blifsim.exe
%System Root%\Xilinx_WebPACK\bin\nt\bloxsim.728
%System Root%\Xilinx_WebPACK\bin\nt\bloxsim.exe
%System Root%\Xilinx_WebPACK\bin\nt\libLbXblox.dll
%System Root%\Xilinx_WebPACK\bin\nt\checkini.728
%System Root%\Xilinx_WebPACK\bin\nt\checkini.exe
%System Root%\Xilinx_WebPACK\bin\nt\chipsim.728
%System Root%\Xilinx_WebPACK\bin\nt\chipsim.exe
%System Root%\Xilinx_WebPACK\bin\nt\chkdate.728
%System Root%\Xilinx_WebPACK\bin\nt\chkdate.exe
%System Root%\Xilinx_WebPACK\bin\nt\libNc_Design.dll
%System Root%\Xilinx_WebPACK\bin\nt\libObjectEdit.dll
%System Root%\Xilinx_WebPACK\bin\nt\libObjectGrid.dll
%System Root%\Xilinx_WebPACK\bin\nt\libOt_Toolkit.dll
%System Root%\Xilinx_WebPACK\bin\nt\libPersonalityModule.dll
%System Root%\Xilinx_WebPACK\bin\nt\libpj_pdclimpl.dll
%System Root%\Xilinx_WebPACK\bin\nt\libPortability.dll
%System Root%\Xilinx_WebPACK\bin\nt\libRogueWave.dll
%System Root%\Xilinx_WebPACK\bin\nt\libTk_data.dll
%System Root%\Xilinx_WebPACK\bin\nt\diofft.728
%System Root%\Xilinx_WebPACK\bin\nt\diofft.exe
%System Root%\Xilinx_WebPACK\bin\nt\drc.728
%System Root%\Xilinx_WebPACK\bin\nt\drc.exe
%System Root%\Xilinx_WebPACK\bin\nt\libTk_mesg.dll
%System Root%\Xilinx_WebPACK\bin\nt\libTk_tapkp.dll
%System Root%\Xilinx_WebPACK\bin\nt\libTk_xlnxeda.dll
%System Root%\Xilinx_WebPACK\bin\nt\bttncr32.dll
%System Root%\Xilinx_WebPACK\bin\nt\errview.728
%System Root%\Xilinx_WebPACK\bin\nt\errview.exe
%System Root%\Xilinx_WebPACK\bin\nt\exewrap.728
%System Root%\Xilinx_WebPACK\bin\nt\exewrap.exe
%System Root%\Xilinx_WebPACK\bin\nt\sym.728
%System Root%\Xilinx_WebPACK\bin\nt\sym.exe
%System Root%\Xilinx_WebPACK\bin\nt\libUtilities.dll
%System Root%\Xilinx_WebPACK\bin\nt\perl.dll
%System Root%\Xilinx_WebPACK\bin\nt\filesym.728
%System Root%\Xilinx_WebPACK\bin\nt\filesym.exe
%System Root%\Xilinx_WebPACK\bin\nt\libOt_Common.dll
%System Root%\Xilinx_WebPACK\bin\nt\libDrm_Physlayout.dll
%System Root%\Xilinx_WebPACK\bin\nt\libNgd.dll
%System Root%\Xilinx_WebPACK\bin\nt\libNgd_Netin.dll
%System Root%\Xilinx_WebPACK\bin\nt\libNgd_Netlist.dll
%System Root%\Xilinx_WebPACK\bin\nt\libNgd_Util.dll
%System Root%\Xilinx_WebPACK\bin\nt\libNgeCCE.dll
%System Root%\Xilinx_WebPACK\bin\nt\libParsers.dll
%System Root%\Xilinx_WebPACK\bin\nt\libDrm_Cellmodel.dll
%System Root%\Xilinx_WebPACK\bin\nt\libSpd.dll
%System Root%\Xilinx_WebPACK\bin\nt\libStaticFileParsers.dll
%System Root%\Xilinx_WebPACK\bin\nt\libTcl.dll
%System Root%\Xilinx_WebPACK\bin\nt\makesch.728
%System Root%\Xilinx_WebPACK\bin\nt\makesch.exe
%System Root%\Xilinx_WebPACK\bin\nt\makesym.728
%System Root%\Xilinx_WebPACK\bin\nt\makesym.exe
%System Root%\Xilinx_WebPACK\bin\nt\pifg_xa.728
%System Root%\Xilinx_WebPACK\bin\nt\pifg_xa.exe
%System Root%\Xilinx_WebPACK\bin\nt\projnav.728
%System Root%\Xilinx_WebPACK\bin\nt\projnav.exe
%System Root%\Xilinx_WebPACK\bin\nt\sch2jhd.728
%System Root%\Xilinx_WebPACK\bin\nt\sch2jhd.exe
%System Root%\Xilinx_WebPACK\bin\nt\sch2tf.728
%System Root%\Xilinx_WebPACK\bin\nt\sch2tf.exe
%System Root%\Xilinx_WebPACK\bin\nt\schem.728
%System Root%\Xilinx_WebPACK\bin\nt\schem.exe
%System Root%\Xilinx_WebPACK\bin\nt\seterr.728
%System Root%\Xilinx_WebPACK\bin\nt\seterr.exe
%System Root%\Xilinx_WebPACK\bin\nt\synview.728
%System Root%\Xilinx_WebPACK\bin\nt\synview.exe
%System Root%\Xilinx_WebPACK\bin\nt\tkwdog.728
%System Root%\Xilinx_WebPACK\bin\nt\tkwdog.exe
%System Root%\Xilinx_WebPACK\bin\nt\updatesc.728
%System Root%\Xilinx_WebPACK\bin\nt\updatesc.exe
%System Root%\Xilinx_WebPACK\bin\nt\vericode.728
%System Root%\Xilinx_WebPACK\bin\nt\vericode.exe
%System Root%\Xilinx_WebPACK\bin\nt\vhdl.728
%System Root%\Xilinx_WebPACK\bin\nt\vhdl.exe
%System Root%\Xilinx_WebPACK\bin\nt\vhdtdtfi.728
%System Root%\Xilinx_WebPACK\bin\nt\vhdtdtfi.exe
%System Root%\Xilinx_WebPACK\bin\nt\vmod.728
%System Root%\Xilinx_WebPACK\bin\nt\vmod.exe
%System Root%\Xilinx_WebPACK\bin\nt\waves.728
%System Root%\Xilinx_WebPACK\bin\nt\waves.exe
%System Root%\Xilinx_WebPACK\bin\nt\xcpy.728
%System Root%\Xilinx_WebPACK\bin\nt\xcpy.exe
%System Root%\Xilinx_WebPACK\bin\nt\xilperl.728
%System Root%\Xilinx_WebPACK\bin\nt\xilperl.exe
%System Root%\Xilinx_WebPACK\bin\nt\xport.728
%System Root%\Xilinx_WebPACK\bin\nt\xport.exe
%System Root%\Xilinx_WebPACK\bin\nt\xst.728
%System Root%\Xilinx_WebPACK\bin\nt\xst.exe
%System Root%\Xilinx_WebPACK\bin\nt\zip.728
%System Root%\Xilinx_WebPACK\bin\nt\zip.exe
%System Root%\Xilinx_WebPACK\bin\nt\jhdparse.728
%System Root%\Xilinx_WebPACK\bin\nt\jhdparse.exe
%System Root%\Xilinx_WebPACK\bin\nt\tdo2abel.728
%System Root%\Xilinx_WebPACK\bin\nt\tdo2abel.exe
%System Root%\Xilinx_WebPACK\bin\nt\webpack.728
%System Root%\Xilinx_WebPACK\bin\nt\webpack.exe
%System Root%\Xilinx_WebPACK\data\xc_edf.rul
%System Root%\Xilinx_WebPACK\data\vhsm_gen.rul
%System Root%\Xilinx_WebPACK\data\stdtxtio.vhd
%System Root%\Xilinx_WebPACK\data\lib5\abel5lib.dev
%System Root%\Xilinx_WebPACK\data\lib5\abel5lib.inc
%System Root%\Xilinx_WebPACK\data\lib5\define.fft
%System Root%\Xilinx_WebPACK\data\lib5\device.fft
%System Root%\Xilinx_WebPACK\data\lib5\devices.txt
%System Root%\Xilinx_WebPACK\data\lib5\epld_def.fft
%System Root%\Xilinx_WebPACK\data\lib5\epld_dev.fft
%System Root%\Xilinx_WebPACK\data\lib5\fpga_def.fft
%System Root%\Xilinx_WebPACK\data\lib5\fpga_dev.fft
%System Root%\Xilinx_WebPACK\data\lib5\gengate.raw
%System Root%\Xilinx_WebPACK\data\lib5\vhdl_def.fft
%System Root%\Xilinx_WebPACK\data\lib5\vhdl_dev.fft
%System Root%\Xilinx_WebPACK\data\lib5\proptbl\lca.tbl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\netlist.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\ctrl.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\dm.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\edif.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\fct.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\hdl.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\main.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\map.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\min.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\stdcell.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\nsr.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\part.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\pds.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\pld.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\synth.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\timing.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\vhdl.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\vhp.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\vlg.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp\xil.err
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\plslatnpc.edn
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\edolib.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\iobuf.edn
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\plslat.edn
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\plslatc.edn
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\plslatp.edn
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\plslatpc.edn
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\xc9500.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\xst.atb
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\virtexe-7.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\spartan2-6.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\virtex-4.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\virtex-5.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\virtex-6.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\virtexe-6.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\spartan2-5.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\virtexe-8.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\pldlib\templ95.lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\pldlib\xc95288
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee\vhdllib.ref
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee\arch.vho
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee\arch.vhr
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std\vhdllib.ref
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std\arch.vho
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std\arch.vhr
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim\vhdllib.ref
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim\arch.vho
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim\arch.vhr
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls\vhdllib.ref
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls\arch.vho
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls\arch.vhr
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim\vhdllib.ref
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim\arch.vho
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim\arch.vhr
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro\vhdllib.ref
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro\arch.vho
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro\arch.vhr
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_extra.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_bit.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_unsigned.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_signed.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_std.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_unsigned.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_1164.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_arith.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_misc.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_signed.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\standard\standard.vhd
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\standard\textio.vhd
%System Root%\Xilinx_WebPACK\data\xlnxlib\plsflow_syn1.rul
%System Root%\Xilinx_WebPACK\data\xlnxlib\plsflow_syn2.rul
%System Root%\Xilinx_WebPACK\data\xlnxlib\xlnx_bse.edf
%System Root%\Xilinx_WebPACK\data\xlnxlib\xlnx_edf.rul
%System Root%\Xilinx_WebPACK\data\xlnxlib\xlnx_map.edf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_add_sub.inc
%System Root%\Xilinx_WebPACK\data\xportlib\altdpram.inc
%System Root%\Xilinx_WebPACK\data\xportlib\altdpram.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\altram.inc
%System Root%\Xilinx_WebPACK\data\xportlib\altram.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\busmux.inc
%System Root%\Xilinx_WebPACK\data\xportlib\busmux.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\csdpram.inc
%System Root%\Xilinx_WebPACK\data\xportlib\csdpram.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\csfifo.inc
%System Root%\Xilinx_WebPACK\data\xportlib\csfifo.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\dcfifo.inc
%System Root%\Xilinx_WebPACK\data\xportlib\dcfifo.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\expdff.inc
%System Root%\Xilinx_WebPACK\data\xportlib\expdff.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\explatch.inc
%System Root%\Xilinx_WebPACK\data\xportlib\explatch.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\inpltch.inc
%System Root%\Xilinx_WebPACK\data\xportlib\inpltch.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_abs.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_abs.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\nandltch.inc
%System Root%\Xilinx_WebPACK\data\xportlib\mux.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_add_sub.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_and.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_and.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_bustri.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_bustri.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_clshift.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_clshift.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_compare.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_compare.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_constant.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_constant.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_counter.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_counter.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_decode.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_decode.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_dff.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_dff.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_ff.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_ff.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_inv.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_inv.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_latch.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_latch.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_mult.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_mult.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_mux.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_mux.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_or.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_or.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_ram_dq.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_ram_dq.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_ram_io.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_ram_io.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_rom.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_rom.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_shiftreg.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_shiftreg.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_tff.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_tff.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_xor.inc
%System Root%\Xilinx_WebPACK\data\xportlib\lpm_xor.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\mux.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\nandltch.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\norltch.inc
%System Root%\Xilinx_WebPACK\data\xportlib\norltch.tdf
%System Root%\Xilinx_WebPACK\data\xportlib\scfifo.inc
%System Root%\Xilinx_WebPACK\data\xportlib\scfifo.tdf
%System Root%\Xilinx_WebPACK\data\webpack\xstlib.v
%System Root%\Xilinx_WebPACK\data\webpack\edif.ini
%System Root%\Xilinx_WebPACK\data\webpack\pls.ini
%System Root%\Xilinx_WebPACK\data\webpack\scs.ini
%System Root%\Xilinx_WebPACK\data\webpack\verilog.ini
%System Root%\Xilinx_WebPACK\data\webpack\vhdl.ini
%System Root%\Xilinx_WebPACK\data\webpack\xcpls9000.ini
%System Root%\Xilinx_WebPACK\data\webpack\schem.new
%System Root%\Xilinx_WebPACK\data\webpack\vhdltbtpl.new
%System Root%\Xilinx_WebPACK\data\webpack\vhdlpktpl.new
%System Root%\Xilinx_WebPACK\data\webpack\veritftpl.new
%System Root%\Xilinx_WebPACK\data\webpack\synmenu.cfg
%System Root%\Xilinx_WebPACK\data\webpack\vhdllang.tpl
%System Root%\Xilinx_WebPACK\data\webpack\verilang.tpl
%System Root%\Xilinx_WebPACK\data\webpack\abellang.tpl
%System Root%\Xilinx_WebPACK\data\webpack\xdcver.ver
%System Root%\Xilinx_WebPACK\data\webpack\synver.ver
%System Root%\Xilinx_WebPACK\data\webpack\stdtxtio.vhd
%System Root%\Xilinx_WebPACK\data\webpack\vhdllang.ecc
%System Root%\Xilinx_WebPACK\data\webpack\genff.v
%System Root%\Xilinx_WebPACK\data\webpack\genff.vhd
%System Root%\Xilinx_WebPACK\data\webpack\testbnch.tft
%System Root%\Xilinx_WebPACK\data\webpack\splfile.tft
%System Root%\Xilinx_WebPACK\data\webpack\splcore.tft
%System Root%\Xilinx_WebPACK\data\webpack\tfi.tft
%System Root%\Xilinx_WebPACK\data\webpack\vhdlinst.tft
%System Root%\Xilinx_WebPACK\data\webpack\workspace.cfg
%System Root%\Xilinx_WebPACK\data\webpack\HDLeditor.cfg
%System Root%\Xilinx_WebPACK\data\webpack\abellang.ecc
%System Root%\Xilinx_WebPACK\data\webpack\verilang.ecc
%System Root%\Xilinx_WebPACK\data\webpack\ablblf.xcvirtual.fdk
%System Root%\Xilinx_WebPACK\data\webpack\ablxst.xcvirtual.fdk
%System Root%\Xilinx_WebPACK\data\webpack\vhdxst.xcvirtual.fdk
%System Root%\Xilinx_WebPACK\data\webpack\vlgxst.xcvirtual.fdk
%System Root%\Xilinx_WebPACK\data\webpack\xcvirtual.sds
%System Root%\Xilinx_WebPACK\data\webpack\xcvirtual.sfs
%System Root%\Xilinx_WebPACK\data\webpack\xcvirtuala.fdk
%System Root%\Xilinx_WebPACK\data\webpack\cmnabel.fdk
%System Root%\Xilinx_WebPACK\data\webpack\synapps.map
%System Root%\Xilinx_WebPACK\data\webpack\ablblf.synth.fdk
%System Root%\Xilinx_WebPACK\data\webpack\ablxst.synth.fdk
%System Root%\Xilinx_WebPACK\data\webpack\xstsynth.fdk
%System Root%\Xilinx_WebPACK\data\webpack\vhdxst.synth.fdk
%System Root%\Xilinx_WebPACK\data\webpack\vlgxst.synth.fdk
%System Root%\Xilinx_WebPACK\data\webpack\base.fdk
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\numeric_unsigned_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\numeric_bit_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\numeric_extra_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\numeric_signed_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\numeric_std_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\std_logic_arith_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\std_logic_1164_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\std_logic_signed_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee\std_logic_unsigned_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox\logiblox.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox\mvlarith.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox\mvlutil.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\lpm\lpm.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\pls\pls.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\standard\standard_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\stdarith\std_logic_arith_p.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\xc\unisim_VCOMP.vao
%System Root%\Xilinx_WebPACK\data\vhdlan\xc\xc9000_macro_comp.vao
%System Root%\Xilinx_WebPACK\help\nt\usenglish\hdledit.cnt
%System Root%\Xilinx_WebPACK\help\nt\usenglish\hdledit.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\projnav.cnt
%System Root%\Xilinx_WebPACK\help\nt\usenglish\projnav.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\schem.cnt
%System Root%\Xilinx_WebPACK\help\nt\usenglish\schem.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\sym.cnt
%System Root%\Xilinx_WebPACK\help\nt\usenglish\sym.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\fsm.html
%System Root%\Xilinx_WebPACK\help\nt\usenglish\abelbusnotation.html
%System Root%\Xilinx_WebPACK\help\nt\usenglish\dkwpxlnx.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\waves.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\MTOC.chm
%System Root%\Xilinx_WebPACK\help\nt\usenglish\schem.chm
%System Root%\Xilinx_WebPACK\help\nt\usenglish\sym.chm
%System Root%\Xilinx_WebPACK\verilog\src\iSE\unisim_comp.v
%System Root%\Xilinx_WebPACK\verilog\src\iSE\xc9000\xc9000_macro.v
%System Root%\Xilinx_WebPACK\verilog\src\iSE\xc9000\xc9000_macro_comp.v
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl\jc2_sabl.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl\jc2_top.sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl\jc2_top.ucf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl\jcounter.abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl\jcounter.sym
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_abl\jc2_abl.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_abl\jc2_top.abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_abl\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch\jc2_sch.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch\jc2_test.vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch\jc2_top.sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch\jc2_top.ucf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jc2_func.tf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jc2_sver.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jc2_test.tf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jc2_tim.tf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jc2_top.sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jc2_top.ucf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jcounter.sym
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\jcounter.v
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\jc2_svhd.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\jc2_test.vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\jc2_top.sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\jc2_top.ucf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\jcounter.sym
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\jcounter.vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\jc2_func.tf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\jc2_test.tf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\jc2_tim.tf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\jc2_top.ucf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\jc2_top.v
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\jc2_ver.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd\jc2_test.vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd\jc2_top.vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd\jc2_vhd.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply\adder.abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply\multi.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply\multiply.abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply\pla.wav
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property\prop9500.abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property\prop9500.ucf
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property\property.npl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc_ver.npl
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc_fsim.do
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc_tb.tf
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc.ucf
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc.v
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc_tsim.do
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver\jc.jhd
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc.ucf
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc_vhd.npl
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc_tb.vhd
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\readme.txt
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc.vhd
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc_tsim.do
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc_fsim.do
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd\jc.jhd
%System Root%\Xilinx_WebPACK\readme_ecs_cpldlib.html
%System Root%\Xilinx_WebPACK\readme_chipviewer.html
%System Root%\Xilinx_WebPACK\readme_cpld_fitter.html
%System Root%\Xilinx_WebPACK\readme_programmer.html
%System Root%\Xilinx_WebPACK\readme_xpla_fitter.html
%System Root%\Xilinx_WebPACK\readme_xpla_programmer.html
%System Root%\Xilinx_WebPACK\ver_chipviewer.html
%System Root%\Xilinx_WebPACK\ver_cpld_fitter.html
%System Root%\Xilinx_WebPACK\ver_ecs_cpldlib.html
%System Root%\Xilinx_WebPACK\ver_programmer.html
%System Root%\Xilinx_WebPACK\ver_xpla_fitter.html
%System Root%\Xilinx_WebPACK\ver_xpla_programmer.html
%System Root%\Xilinx_WebPACK\ver_spartan2.html
%System Root%\Xilinx_WebPACK\readme_spartan2.html
%System Root%\Xilinx_WebPACK\doc\usenglish\index.htm
%System Root%\Xilinx_WebPACK\help\nt\usenglish\jtagpgmr.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\constraints_editor.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\timingan.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\xdcguide.hlp
%System Root%\Xilinx_WebPACK\help\nt\usenglish\webpack.chm
%System Root%\Xilinx_WebPACK\help\nt\usenglish\FPGA2.chm
%System Root%\Xilinx_WebPACK\help\nt\usenglish\Dkxilinx.hlp
%System Root%\Xilinx_WebPACK\help\data\chipviewer\WHStart.htm
%System Root%\Xilinx_WebPACK\xpla\xpla_isp.chm
%System Root%\Xilinx_WebPACK\data\webpack\xc9000.ini
%System%\Inetwh32.dll
%System Root%\Xilinx_WebPACK\WEBPACK_setup.001
%System Root%\Xilinx_WebPACK\WEBPACK_setup.REG
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR\11306.DLL
%Windows%\_delis32.ini

Fügt die folgenden Registrierungsschlüssel hinzu:

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\Paths\Install

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\Strings\ProgramGroup

HKEY_LOCAL_MACHINE\Software\Microsoft\
Windows\CurrentVersion\Uninstall\
Design_Entry

HKEY_LOCAL_MACHINE\Software\Microsoft\
Windows\CurrentVersion\App Paths\
yourapp.Exe

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\Strings\ABEL_CPLD

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\paths\Bin

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\paths\Config

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\paths\Examples

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\paths\XILINX

HKEY_CLASSES_ROOT\XLNXEDA\Products\
WebPACK\paths\OSLocation

Fügt die folgenden Registrierungseinträge hinzu:

HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\
Windows\CurrentVersion\Uninstall\
Design_Entry
UninstallString = "%Windows%\IsUninst.exe -f%System Root%\Xilinx_WebPACK\Uninst_WPabelcpld.isu"

HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\
Windows\CurrentVersion\App Paths\
yourapp.Exe
Path = "%System Root%\Xilinx_WebPACK"

HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\
Windows\CurrentVersion\Uninstall\
Design_Entry
DisplayName = "Xilinx WebPACK Design_Entry"

HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\
Windows\CurrentVersion\SharedDlls
%System%\Inetwh32.dll = "1"

Einschleusungsroutine

Schleust die folgenden Dateien ein:

%User Temp%\ext3.tmp
%User Temp%\pft7~tmp\pftw1.pkg
%User Temp%\pft7~tmp\Disk1\_ISDel.exe
%User Temp%\pft7~tmp\Disk1\Setup.exe
%User Temp%\pft7~tmp\Disk1\_inst32i.ex_
%User Temp%\pft7~tmp\Disk1\os.dat
%User Temp%\pft7~tmp\Disk1\lang.dat
%User Temp%\pft7~tmp\Disk1\_Setup.dll
%User Temp%\pft7~tmp\Disk1\setup.ins
%User Temp%\pft7~tmp\Disk1\_sys1.cab
%User Temp%\pft7~tmp\Disk1\_user1.cab
%User Temp%\pft7~tmp\Disk1\_sys1.hdr
%User Temp%\pft7~tmp\Disk1\DATA.TAG
%User Temp%\pft7~tmp\Disk1\_user1.hdr
%User Temp%\pft7~tmp\Disk1\SETUP.INI
%User Temp%\pft7~tmp\Disk1\setup.bmp
%User Temp%\pft7~tmp\Disk1\setup.lid
%User Temp%\pft7~tmp\Disk1\data1.cab
%User Temp%\pft7~tmp\Disk1\layout.bin
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel\.data
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel\aim.vhd
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel\pls.vhd
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000\.data
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000\xc9000_macro.vhd
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000\xc9000_macro_comp.vhd
%User Temp%\pft7~tmp\Disk1\about_ver_bottom.html
%User Temp%\pft7~tmp\Disk1\about_ver_top.html
%User Temp%\pft7~tmp\Disk1\about_versions.html
%User Temp%\pft7~tmp\Disk1\devicesupportpage.html
%User Temp%\pft7~tmp\Disk1\webpack_overview.html
%User Temp%\pft7~tmp\Disk1\WEBPACK_setup.reg
%User Temp%\pft7~tmp\Disk1\revhist_design_entry.html
%User Temp%\pft7~tmp\Disk1\relnote_design_entry.html
%User Temp%\pft7~tmp\Disk1\readme_design_entry.html
%User Temp%\pft7~tmp\Disk1\ver_design_entry.html
%User Temp%\pft7~tmp\Disk1\bin\nt\ntwaveh.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\cw3230mt.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libbasdr.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libGui_Framework.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libInterToolCommunication.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libLbGblox.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libXml.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\ahdl2blf.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\ascin.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\ascout.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\asyin.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\asyout.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\navlink.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\blf2lang.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\blif2eqn.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\blif2net.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\bliflink.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\blifopt.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\blifsim.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\bloxsim.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\libLbXblox.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\checkini.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\chipsim.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\chkdate.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\libNc_Design.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libObjectEdit.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libObjectGrid.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libOt_Toolkit.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libPersonalityModule.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libpj_pdclimpl.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libPortability.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libRogueWave.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libTk_data.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\diofft.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\drc.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\libTk_mesg.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libTk_tapkp.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libTk_xlnxeda.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\bttncr32.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\errview.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\exewrap.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\sym.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\libUtilities.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\perl.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\filesym.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\libOt_Common.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libDrm_Physlayout.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libNgd.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libNgd_Netin.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libNgd_Netlist.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libNgd_Util.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libNgeCCE.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libParsers.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libDrm_Cellmodel.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libSpd.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libStaticFileParsers.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\libTcl.dll
%User Temp%\pft7~tmp\Disk1\bin\nt\makesch.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\makesym.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\pifg_xa.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\projnav.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\sch2jhd.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\sch2tf.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\schem.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\seterr.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\synview.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\tkwdog.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\updatesc.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\vericode.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\vhdl.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\vhdtdtfi.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\vmod.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\waves.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\xcpy.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\xilperl.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\xport.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\xst.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\zip.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\jhdparse.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\tdo2abel.exe
%User Temp%\pft7~tmp\Disk1\bin\nt\webpack.exe
%User Temp%\pft7~tmp\Disk1\data\lib5\proptbl\lca.tbl
%User Temp%\pft7~tmp\Disk1\data\lib5\abel5lib.dev
%User Temp%\pft7~tmp\Disk1\data\lib5\abel5lib.inc
%User Temp%\pft7~tmp\Disk1\data\lib5\define.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\device.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\devices.txt
%User Temp%\pft7~tmp\Disk1\data\lib5\epld_def.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\epld_dev.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\fpga_def.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\fpga_dev.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\gengate.raw
%User Temp%\pft7~tmp\Disk1\data\lib5\vhdl_def.fft
%User Temp%\pft7~tmp\Disk1\data\lib5\vhdl_dev.fft
%User Temp%\pft7~tmp\Disk1\data\xc_edf.rul
%User Temp%\pft7~tmp\Disk1\data\vhsm_gen.rul
%User Temp%\pft7~tmp\Disk1\data\stdtxtio.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\netlist.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\ctrl.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\dm.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\edif.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\fct.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\hdl.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\main.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\map.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\min.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\stdcell.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\nsr.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\part.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\pds.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\pld.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\synth.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\timing.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\vhdl.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\vhp.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\vlg.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp\xil.err
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\pldlib\templ95.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\pldlib\xc95288
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\plslatnpc.edn
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\edolib.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\iobuf.edn
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\plslat.edn
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\plslatc.edn
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\plslatp.edn
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\plslatpc.edn
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\xc9500.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\xst.atb
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\virtexe-7.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\spartan2-6.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\virtex-4.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\virtex-5.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\virtex-6.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\virtexe-6.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\spartan2-5.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\virtexe-8.lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee\vhdllib.ref
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee\arch.vho
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee\arch.vhr
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std\vhdllib.ref
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std\arch.vho
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std\arch.vhr
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\aim\vhdllib.ref
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\aim\arch.vho
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\aim\arch.vhr
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls\vhdllib.ref
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls\arch.vho
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls\arch.vhr
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim\vhdllib.ref
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim\arch.vho
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim\arch.vhr
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro\vhdllib.ref
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro\arch.vho
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro\arch.vhr
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_extra.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_bit.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_unsigned.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_signed.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_std.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\numeric_unsigned.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_1164.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_arith.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_misc.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee\std_logic_signed.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\standard\standard.vhd
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\standard\textio.vhd
%User Temp%\pft7~tmp\Disk1\data\xlnxlib\plsflow_syn1.rul
%User Temp%\pft7~tmp\Disk1\data\xlnxlib\plsflow_syn2.rul
%User Temp%\pft7~tmp\Disk1\data\xlnxlib\xlnx_bse.edf
%User Temp%\pft7~tmp\Disk1\data\xlnxlib\xlnx_edf.rul
%User Temp%\pft7~tmp\Disk1\data\xlnxlib\xlnx_map.edf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_add_sub.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\altdpram.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\altdpram.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\altram.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\altram.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\busmux.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\busmux.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\csdpram.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\csdpram.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\csfifo.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\csfifo.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\dcfifo.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\dcfifo.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\expdff.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\expdff.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\explatch.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\explatch.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\inpltch.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\inpltch.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_abs.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_abs.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\nandltch.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\mux.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_add_sub.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_and.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_and.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_bustri.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_bustri.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_clshift.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_clshift.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_compare.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_compare.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_constant.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_constant.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_counter.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_counter.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_decode.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_decode.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_dff.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_dff.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_ff.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_ff.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_inv.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_inv.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_latch.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_latch.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_mult.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_mult.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_mux.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_mux.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_or.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_or.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_ram_dq.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_ram_dq.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_ram_io.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_ram_io.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_rom.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_rom.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_shiftreg.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_shiftreg.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_tff.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_tff.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_xor.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\lpm_xor.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\mux.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\nandltch.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\norltch.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\norltch.tdf
%User Temp%\pft7~tmp\Disk1\data\xportlib\scfifo.inc
%User Temp%\pft7~tmp\Disk1\data\xportlib\scfifo.tdf
%User Temp%\pft7~tmp\Disk1\data\webpack\xstlib.v
%User Temp%\pft7~tmp\Disk1\data\webpack\edif.ini
%User Temp%\pft7~tmp\Disk1\data\webpack\pls.ini
%User Temp%\pft7~tmp\Disk1\data\webpack\scs.ini
%User Temp%\pft7~tmp\Disk1\data\webpack\verilog.ini
%User Temp%\pft7~tmp\Disk1\data\webpack\vhdl.ini
%User Temp%\pft7~tmp\Disk1\data\webpack\xcpls9000.ini
%User Temp%\pft7~tmp\Disk1\data\webpack\schem.new
%User Temp%\pft7~tmp\Disk1\data\webpack\vhdltbtpl.new
%User Temp%\pft7~tmp\Disk1\data\webpack\vhdlpktpl.new
%User Temp%\pft7~tmp\Disk1\data\webpack\veritftpl.new
%User Temp%\pft7~tmp\Disk1\data\webpack\synmenu.cfg
%User Temp%\pft7~tmp\Disk1\data\webpack\vhdllang.tpl
%User Temp%\pft7~tmp\Disk1\data\webpack\verilang.tpl
%User Temp%\pft7~tmp\Disk1\data\webpack\abellang.tpl
%User Temp%\pft7~tmp\Disk1\data\webpack\xdcver.ver
%User Temp%\pft7~tmp\Disk1\data\webpack\synver.ver
%User Temp%\pft7~tmp\Disk1\data\webpack\stdtxtio.vhd
%User Temp%\pft7~tmp\Disk1\data\webpack\vhdllang.ecc
%User Temp%\pft7~tmp\Disk1\data\webpack\genff.v
%User Temp%\pft7~tmp\Disk1\data\webpack\genff.vhd
%User Temp%\pft7~tmp\Disk1\data\webpack\testbnch.tft
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%Start Menu%\Programs\Xilinx WebPACK\Accessories\Uninstall Design_Entry.lnk
%Desktop%\WebPACK Project Navigator.lnk
%Windows%\_INS33IS._MP

(Hinweis: %User Temp% ist der Ordner 'Temp' des aktuellen Benutzers, normalerweise C:\Dokumente und Einstellungen\{Benutzername}\Lokale Einstellungen\Temp unter Windows 2000, XP und Server 2003.. %Windows% ist der Windows Ordner, normalerweise C:\Windows oder C:\WINNT.. %System Root% ist der Stammordner, normalerweise C:\. Dort befindet sich auch das Betriebssystem.. %Start Menu% ist der Ordner 'Startmenü' des aktuellen Benutzers, normalerweise C:\Windows\Profile\{Benutzername}\Startmenü unter Windows 98 und ME, C:\WINNT\Profile\{Benutzername}\Startmenü unter Windows NT und C:\Windows\Startmenü oder C:\Dokumente und Einstellungen\{Benutzername}\Startmenü unter Windows 2000, XP und Server 2003.. %Desktop% ist der Ordner 'Desktop' für den aktuellen Benutzer, normalerweise C:\Windows\Profile\{Benutzername}\Desktop unter Windows 98 und ME, C:\WINNT\Profile\{Benutzername}\Desktop unter Windows NT und C:\Dokumente und Einstellungen\{Benutzername}\Desktop unter Windows 2000, XP und Server 2003.)

Solução

Mecanismo de varredura mínima: 9.8

Step 1

Für Windows ME und XP Benutzer: Stellen Sie vor einer Suche sicher, dass die Systemwiederherstellung deaktiviert ist, damit der gesamte Computer durchsucht werden kann.

Step 2

Diesen Registrierungsschlüssel löschen

[ Saber mais ]

Wichtig: Eine nicht ordnungsgemäße Bearbeitung der Windows Registrierung kann zu einer dauerhaften Fehlfunktion des Systems führen. Führen Sie diesen Schritt nur durch, wenn Sie mit der Vorgehensweise vertraut sind oder wenn Sie Ihren Systemadministrator um Unterstützung bitten können. Lesen Sie ansonsten zuerst diesen Microsoft Artikel, bevor Sie die Registrierung Ihres Computers ändern.

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\Paths
- Install

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\Strings
- ProgramGroup

In HKEY_LOCAL_MACHINE\Software\Microsoft\Windows\CurrentVersion\Uninstall
- Design_Entry

In HKEY_LOCAL_MACHINE\Software\Microsoft\Windows\CurrentVersion\App Paths
- yourapp.Exe

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\Strings
- ABEL_CPLD

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\paths
- Bin

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\paths
- Config

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\paths
- Examples

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\paths
- XILINX

In HKEY_CLASSES_ROOT\XLNXEDA\Products\WebPACK\paths
- OSLocation

Step 3

Diesen Registrierungswert löschen

[ Saber mais ]

In HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\Windows\CurrentVersion\Uninstall\Design_Entry
- UninstallString = "%Windows%\IsUninst.exe -f%System Root%\Xilinx_WebPACK\Uninst_WPabelcpld.isu"

In HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\Windows\CurrentVersion\App Paths\yourapp.Exe
- Path = "%System Root%\Xilinx_WebPACK"

In HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\Windows\CurrentVersion\Uninstall\Design_Entry
- DisplayName = "Xilinx WebPACK Design_Entry"

In HKEY_LOCAL_MACHINE\SOFTWARE\Microsoft\Windows\CurrentVersion\SharedDlls
- %System%\Inetwh32.dll = "1"

Step 4

Diese Dateien suchen und löschen

[ Saber mais ]

Möglicherweise sind einige Komponentendateien verborgen. Aktivieren Sie unbedingt das Kontrollkästchen Versteckte Elemente durchsuchen unter "Weitere erweiterte Optionen", um alle verborgenen Dateien und Ordner in den Suchergebnissen zu berücksichtigen.

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%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\projnav.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\schem.cnt
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\schem.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\sym.cnt
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\sym.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\fsm.html
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%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\dkwpxlnx.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\waves.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\MTOC.chm
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\schem.chm
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\sym.chm
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\jtagpgmr.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\constraints_editor.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\timingan.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\xdcguide.hlp
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\webpack.chm
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\FPGA2.chm
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish\Dkxilinx.hlp
%User Temp%\pft7~tmp\Disk1\help\data\chipviewer\WHStart.htm
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE\xc9000\xc9000_macro.v
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE\xc9000\xc9000_macro_comp.v
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE\unisim_comp.v
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl\jc2_sabl.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl\jc2_top.sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl\jc2_top.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl\jcounter.abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl\jcounter.sym
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl\jc2_abl.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl\jc2_top.abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch\jc2_sch.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch\jc2_test.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch\jc2_top.sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch\jc2_top.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jc2_func.tf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jc2_sver.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jc2_test.tf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jc2_tim.tf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jc2_top.sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jc2_top.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jcounter.sym
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\jcounter.v
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\jc2_svhd.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\jc2_test.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\jc2_top.sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\jc2_top.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\jcounter.sym
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\jcounter.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver\jc2_func.tf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver\jc2_test.tf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver\jc2_tim.tf
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%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver\jc2_top.v
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%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd\jc2_test.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd\jc2_top.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd\jc2_vhd.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply\adder.abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply\multi.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply\multiply.abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply\pla.wav
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property\prop9500.abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property\prop9500.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property\property.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc_ver.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc_fsim.do
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc_tb.tf
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc.v
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc_tsim.do
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver\jc.jhd
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc.ucf
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc_vhd.npl
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc_tb.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\readme.txt
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc.vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc_tsim.do
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc_fsim.do
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd\jc.jhd
%User Temp%\pft7~tmp\Disk1\doc\usenglish\index.htm
%User Temp%\pft7~tmp\Disk1\readme_ecs_cpldlib.html
%User Temp%\pft7~tmp\Disk1\readme_chipviewer.html
%User Temp%\pft7~tmp\Disk1\readme_cpld_fitter.html
%User Temp%\pft7~tmp\Disk1\readme_programmer.html
%User Temp%\pft7~tmp\Disk1\readme_xpla_fitter.html
%User Temp%\pft7~tmp\Disk1\readme_xpla_programmer.html
%User Temp%\pft7~tmp\Disk1\ver_chipviewer.html
%User Temp%\pft7~tmp\Disk1\ver_cpld_fitter.html
%User Temp%\pft7~tmp\Disk1\ver_ecs_cpldlib.html
%User Temp%\pft7~tmp\Disk1\ver_programmer.html
%User Temp%\pft7~tmp\Disk1\ver_xpla_fitter.html
%User Temp%\pft7~tmp\Disk1\ver_xpla_programmer.html
%User Temp%\pft7~tmp\Disk1\ver_spartan2.html
%User Temp%\pft7~tmp\Disk1\readme_spartan2.html
%User Temp%\pft7~tmp\Disk1\xpla\xpla_isp.chm
%User Temp%\pft7~tmp\Disk1\data1.hdr
%User Temp%\_INS5566._MP
%User Temp%\_ISTMP1.DIR\_INS5576._MP
%User Temp%\_ISTMP1.DIR\ZDataI51.dll
%User Temp%\_ISTMP1.DIR\_WUTL951.DLL
%User Temp%\_ISTMP1.DIR\_INS0432.INI
%Windows%\_isenv31.ini
%System Root%\Xilinx_WebPACK\fileset.txt
%System Root%\Xilinx_WebPACK\WebPACK_setup.bat
%Start Menu%\Programs\Xilinx WebPACK\ About WebPACK.lnk
%Start Menu%\Programs\Xilinx WebPACK\ Webpack Project Navigator.lnk
%Start Menu%\Programs\Xilinx WebPACK\Help and Technical Support.lnk
%Start Menu%\Programs\Xilinx WebPACK\Accessories\Uninstall Design_Entry.lnk
%Desktop%\WebPACK Project Navigator.lnk
%Windows%\_INS33IS._MP

Step 5

Diese Ordner suchen und löschen

[ Saber mais ]

Aktivieren Sie unbedingt das Kontrollkästchen Versteckte Elemente durchsuchen unter Weitere erweiterte Optionen, um alle verborgenen Ordner in den Suchergebnissen zu berücksichtigen.

%User Temp%\pft7~tmp
%User Temp%\pft7~tmp\Disk1
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE
%User Temp%\pft7~tmp\Disk1\vhdl\src
%User Temp%\pft7~tmp\Disk1\vhdl
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\bin\nt
%User Temp%\pft7~tmp\Disk1\bin
%User Temp%\pft7~tmp\Disk1\data\lib5\proptbl
%User Temp%\pft7~tmp\Disk1\data\lib5
%User Temp%\pft7~tmp\Disk1\data
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\pldlib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\aim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\standard
%User Temp%\pft7~tmp\Disk1\data\xlnxlib
%User Temp%\pft7~tmp\Disk1\data\xportlib
%User Temp%\pft7~tmp\Disk1\data\webpack
%User Temp%\pft7~tmp\Disk1\data\vhdlan\ieee
%User Temp%\pft7~tmp\Disk1\data\vhdlan
%User Temp%\pft7~tmp\Disk1\data\vhdlan\logiblox
%User Temp%\pft7~tmp\Disk1\data\vhdlan\lpm
%User Temp%\pft7~tmp\Disk1\data\vhdlan\pls
%User Temp%\pft7~tmp\Disk1\data\vhdlan\standard
%User Temp%\pft7~tmp\Disk1\data\vhdlan\stdarith
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%User Temp%\pft7~tmp\Disk1\help\nt\usenglish
%User Temp%\pft7~tmp\Disk1\help\nt
%User Temp%\pft7~tmp\Disk1\help
%User Temp%\pft7~tmp\Disk1\help\data\chipviewer
%User Temp%\pft7~tmp\Disk1\help\data
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%User Temp%\pft7~tmp\Disk1\WPexamples\cpld
%User Temp%\pft7~tmp\Disk1\WPexamples
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd
%User Temp%\pft7~tmp\Disk1\doc\usenglish
%User Temp%\pft7~tmp\Disk1\doc
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%User Temp%\_ISTMP1.DIR
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%System Root%\Xilinx_WebPACK
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%System Root%\Xilinx_WebPACK\bin
%System Root%\Xilinx_WebPACK\bin\nt
%System Root%\Xilinx_WebPACK\data
%System Root%\Xilinx_WebPACK\data\lib5
%System Root%\Xilinx_WebPACK\data\lib5\proptbl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\pldlib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\standard
%System Root%\Xilinx_WebPACK\data\xlnxlib
%System Root%\Xilinx_WebPACK\data\xportlib
%System Root%\Xilinx_WebPACK\data\webpack
%System Root%\Xilinx_WebPACK\data\vhdlan
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox
%System Root%\Xilinx_WebPACK\data\vhdlan\lpm
%System Root%\Xilinx_WebPACK\data\vhdlan\pls
%System Root%\Xilinx_WebPACK\data\vhdlan\standard
%System Root%\Xilinx_WebPACK\data\vhdlan\stdarith
%System Root%\Xilinx_WebPACK\data\vhdlan\xc
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%System Root%\Xilinx_WebPACK\verilog
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%System Root%\Xilinx_WebPACK\verilog\src\iSE\xc9000
%System Root%\Xilinx_WebPACK\WPexamples
%System Root%\Xilinx_WebPACK\WPexamples\cpld
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%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property
%System Root%\Xilinx_WebPACK\WPexamples\fpga
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd
%System Root%\Xilinx_WebPACK\doc
%System Root%\Xilinx_WebPACK\doc\usenglish
%System Root%\Xilinx_WebPACK\help\data
%System Root%\Xilinx_WebPACK\help\data\chipviewer
%System Root%\Xilinx_WebPACK\xpla
%Start Menu%\Programs\Xilinx WebPACK
%Start Menu%\Programs\Xilinx WebPACK\Accessories

Die Malware-/Grayware-/Spyware-Ordner löschen:

Klicken Sie mit der rechten Maustaste auf Start und dann je nach Windows Version auf Suchen... oder Finden....
Geben Sie in das Feld Name Folgendes ein:

%User Temp%\pft7~tmp
%User Temp%\pft7~tmp\Disk1
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE
%User Temp%\pft7~tmp\Disk1\vhdl\src
%User Temp%\pft7~tmp\Disk1\vhdl
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\bin\nt
%User Temp%\pft7~tmp\Disk1\bin
%User Temp%\pft7~tmp\Disk1\data\lib5\proptbl
%User Temp%\pft7~tmp\Disk1\data\lib5
%User Temp%\pft7~tmp\Disk1\data
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\pldlib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std
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%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\standard
%User Temp%\pft7~tmp\Disk1\data\xlnxlib
%User Temp%\pft7~tmp\Disk1\data\xportlib
%User Temp%\pft7~tmp\Disk1\data\webpack
%User Temp%\pft7~tmp\Disk1\data\vhdlan\ieee
%User Temp%\pft7~tmp\Disk1\data\vhdlan
%User Temp%\pft7~tmp\Disk1\data\vhdlan\logiblox
%User Temp%\pft7~tmp\Disk1\data\vhdlan\lpm
%User Temp%\pft7~tmp\Disk1\data\vhdlan\pls
%User Temp%\pft7~tmp\Disk1\data\vhdlan\standard
%User Temp%\pft7~tmp\Disk1\data\vhdlan\stdarith
%User Temp%\pft7~tmp\Disk1\data\vhdlan\xc
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish
%User Temp%\pft7~tmp\Disk1\help\nt
%User Temp%\pft7~tmp\Disk1\help
%User Temp%\pft7~tmp\Disk1\help\data\chipviewer
%User Temp%\pft7~tmp\Disk1\help\data
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE
%User Temp%\pft7~tmp\Disk1\verilog\src
%User Temp%\pft7~tmp\Disk1\verilog
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld
%User Temp%\pft7~tmp\Disk1\WPexamples
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd
%User Temp%\pft7~tmp\Disk1\doc\usenglish
%User Temp%\pft7~tmp\Disk1\doc
%User Temp%\pft7~tmp\Disk1\xpla
%User Temp%\_ISTMP1.DIR
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR
%System Root%\Xilinx_WebPACK
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%System Root%\Xilinx_WebPACK\data
%System Root%\Xilinx_WebPACK\data\lib5
%System Root%\Xilinx_WebPACK\data\lib5\proptbl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\pldlib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\standard
%System Root%\Xilinx_WebPACK\data\xlnxlib
%System Root%\Xilinx_WebPACK\data\xportlib
%System Root%\Xilinx_WebPACK\data\webpack
%System Root%\Xilinx_WebPACK\data\vhdlan
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox
%System Root%\Xilinx_WebPACK\data\vhdlan\lpm
%System Root%\Xilinx_WebPACK\data\vhdlan\pls
%System Root%\Xilinx_WebPACK\data\vhdlan\standard
%System Root%\Xilinx_WebPACK\data\vhdlan\stdarith
%System Root%\Xilinx_WebPACK\data\vhdlan\xc
%System Root%\Xilinx_WebPACK\help
%System Root%\Xilinx_WebPACK\help\nt
%System Root%\Xilinx_WebPACK\help\nt\usenglish
%System Root%\Xilinx_WebPACK\verilog
%System Root%\Xilinx_WebPACK\verilog\src
%System Root%\Xilinx_WebPACK\verilog\src\iSE
%System Root%\Xilinx_WebPACK\verilog\src\iSE\xc9000
%System Root%\Xilinx_WebPACK\WPexamples
%System Root%\Xilinx_WebPACK\WPexamples\cpld
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property
%System Root%\Xilinx_WebPACK\WPexamples\fpga
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd
%System Root%\Xilinx_WebPACK\doc
%System Root%\Xilinx_WebPACK\doc\usenglish
%System Root%\Xilinx_WebPACK\help\data
%System Root%\Xilinx_WebPACK\help\data\chipviewer
%System Root%\Xilinx_WebPACK\xpla
%Start Menu%\Programs\Xilinx WebPACK
%Start Menu%\Programs\Xilinx WebPACK\Accessories
Wählen Sie im Listenfeld lt;i>Suchen in die Option Arbeitsplatz, und drücken Sie die Eingabetaste.
Markieren Sie den gefundenen Ordner, und drücken Sie UMSCHALT+ENTF, um ihn endgültig zu löschen.
Wiederholen Sie die Schritte 2 bis 4 für die übrigen Ordner: %User Temp%\pft7~tmp
%User Temp%\pft7~tmp\Disk1
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\abel
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE
%User Temp%\pft7~tmp\Disk1\vhdl\src
%User Temp%\pft7~tmp\Disk1\vhdl
%User Temp%\pft7~tmp\Disk1\vhdl\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\bin\nt
%User Temp%\pft7~tmp\Disk1\bin
%User Temp%\pft7~tmp\Disk1\data\lib5\proptbl
%User Temp%\pft7~tmp\Disk1\data\lib5
%User Temp%\pft7~tmp\Disk1\data
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\hlp
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib\pldlib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\lib
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\std
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\aim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\pls
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\unisim
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\ieee
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src
%User Temp%\pft7~tmp\Disk1\data\HDLSynthesis\nt\vhdl\src\standard
%User Temp%\pft7~tmp\Disk1\data\xlnxlib
%User Temp%\pft7~tmp\Disk1\data\xportlib
%User Temp%\pft7~tmp\Disk1\data\webpack
%User Temp%\pft7~tmp\Disk1\data\vhdlan\ieee
%User Temp%\pft7~tmp\Disk1\data\vhdlan
%User Temp%\pft7~tmp\Disk1\data\vhdlan\logiblox
%User Temp%\pft7~tmp\Disk1\data\vhdlan\lpm
%User Temp%\pft7~tmp\Disk1\data\vhdlan\pls
%User Temp%\pft7~tmp\Disk1\data\vhdlan\standard
%User Temp%\pft7~tmp\Disk1\data\vhdlan\stdarith
%User Temp%\pft7~tmp\Disk1\data\vhdlan\xc
%User Temp%\pft7~tmp\Disk1\help\nt\usenglish
%User Temp%\pft7~tmp\Disk1\help\nt
%User Temp%\pft7~tmp\Disk1\help
%User Temp%\pft7~tmp\Disk1\help\data\chipviewer
%User Temp%\pft7~tmp\Disk1\help\data
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE\xc9000
%User Temp%\pft7~tmp\Disk1\verilog\src\iSE
%User Temp%\pft7~tmp\Disk1\verilog\src
%User Temp%\pft7~tmp\Disk1\verilog
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sabl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld
%User Temp%\pft7~tmp\Disk1\WPexamples
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_abl
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sch
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_sver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_svhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\jc2_vhd
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\multiply
%User Temp%\pft7~tmp\Disk1\WPexamples\cpld\property
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_ver
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga
%User Temp%\pft7~tmp\Disk1\WPexamples\fpga\jc_vhd
%User Temp%\pft7~tmp\Disk1\doc\usenglish
%User Temp%\pft7~tmp\Disk1\doc
%User Temp%\pft7~tmp\Disk1\xpla
%User Temp%\_ISTMP1.DIR
%User Temp%\_ISTMP1.DIR\_ISTMP0.DIR
%System Root%\Xilinx_WebPACK
%System Root%\Xilinx_WebPACK\vhdl
%System Root%\Xilinx_WebPACK\vhdl\src
%System Root%\Xilinx_WebPACK\vhdl\src\iSE
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\abel
%System Root%\Xilinx_WebPACK\vhdl\src\iSE\xc9000
%System Root%\Xilinx_WebPACK\bin
%System Root%\Xilinx_WebPACK\bin\nt
%System Root%\Xilinx_WebPACK\data
%System Root%\Xilinx_WebPACK\data\lib5
%System Root%\Xilinx_WebPACK\data\lib5\proptbl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\hlp
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\lib\pldlib
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\std
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\aim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\pls
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\unisim
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\libs\xc9000_macro
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\ieee
%System Root%\Xilinx_WebPACK\data\HDLSynthesis\nt\vhdl\src\standard
%System Root%\Xilinx_WebPACK\data\xlnxlib
%System Root%\Xilinx_WebPACK\data\xportlib
%System Root%\Xilinx_WebPACK\data\webpack
%System Root%\Xilinx_WebPACK\data\vhdlan
%System Root%\Xilinx_WebPACK\data\vhdlan\ieee
%System Root%\Xilinx_WebPACK\data\vhdlan\logiblox
%System Root%\Xilinx_WebPACK\data\vhdlan\lpm
%System Root%\Xilinx_WebPACK\data\vhdlan\pls
%System Root%\Xilinx_WebPACK\data\vhdlan\standard
%System Root%\Xilinx_WebPACK\data\vhdlan\stdarith
%System Root%\Xilinx_WebPACK\data\vhdlan\xc
%System Root%\Xilinx_WebPACK\help
%System Root%\Xilinx_WebPACK\help\nt
%System Root%\Xilinx_WebPACK\help\nt\usenglish
%System Root%\Xilinx_WebPACK\verilog
%System Root%\Xilinx_WebPACK\verilog\src
%System Root%\Xilinx_WebPACK\verilog\src\iSE
%System Root%\Xilinx_WebPACK\verilog\src\iSE\xc9000
%System Root%\Xilinx_WebPACK\WPexamples
%System Root%\Xilinx_WebPACK\WPexamples\cpld
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sabl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_abl
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sch
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_sver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_svhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_ver
%System Root%\Xilinx_WebPACK\WPexamples\cpld\jc2_vhd
%System Root%\Xilinx_WebPACK\WPexamples\cpld\multiply
%System Root%\Xilinx_WebPACK\WPexamples\cpld\property
%System Root%\Xilinx_WebPACK\WPexamples\fpga
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_ver
%System Root%\Xilinx_WebPACK\WPexamples\fpga\jc_vhd
%System Root%\Xilinx_WebPACK\doc
%System Root%\Xilinx_WebPACK\doc\usenglish
%System Root%\Xilinx_WebPACK\help\data
%System Root%\Xilinx_WebPACK\help\data\chipviewer
%System Root%\Xilinx_WebPACK\xpla
%Start Menu%\Programs\Xilinx WebPACK
%Start Menu%\Programs\Xilinx WebPACK\Accessories

Step 6

Durchsuchen Sie Ihren Computer mit Ihrem Trend Micro Produkt, und löschen Sie Dateien, die als TROJ_LOVELETTER.DAM entdeckt werden. Falls die entdeckten Dateien bereits von Ihrem Trend Micro Produkt gesäubert, gelöscht oder in Quarantäne verschoben wurden, sind keine weiteren Schritte erforderlich. Dateien in Quarantäne können einfach gelöscht werden. Auf dieser Knowledge-Base-Seite finden Sie weitere Informationen.

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